Power Characterization of Digital Filters Implemented on FPGA

G. C. Cardarilli, A. Del Re, A. Nannarelli, and M. Re

Proc. of 2002 IEEE International Symposium on Circuits and Systems (ISCAS), Vol V, pages 801-804.
Phoenix, Arizona, USA, May 26-29, 2002.

Abstract - The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power consumption estimates from the measurement of the average current absorption of digital filters mapped on a Field Programmable Gate Array (FPGA). We also compare the measurements made with the results previously obtained for a standard cells implementation of the same filters. Moreover, we explore the possibility of carrying out measurements of other electrical parameters on hardware to extract information on a system, instead of simulating its behavior with complicated models.

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