RNS-based Architectures for DSP

The use of the RNS allows the decomposition of a given dynamic range in slices of smaller range on which the computation can be efficiently implemented in parallel. The drawback presented by the RNS is the overhead introduced by the input and output conversions from binary to RNS and vice versa. This overhead (latency and area) can be reduced by using efficient conversion techniques.

Selected Publications in the Area

• G.C. Cardarilli, L. Di Nunzio, R. Fazzolari, A. Nannarelli, M. Petricca, and M. Re, "Design Space Exploration based Methodology for Residue Number System Digital Filters Implementation", IEEE Transactions on Emerging Topics in Computing, vol. 10, no. 1, pp. 186-198, 1 Jan.-Mar. 2022.

• G.C. Cardarilli, A. Nannarelli, M. Petricca, and M. Re, "Characterization of RNS multiply-add units for power efficient DSP", Proc. of 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, Colorado (USA), 2-5 Aug. 2015.

• P. Albicocco, G. C. Cardarilli, A. Nannarelli, and M. Re, "Twenty Years of Research on RNS for DSP: Lessons Learned and Future Perspectives", Proc. of the Int.l Symposium on Integrated Circuits (ISIC 2014), Singapore, Dec. 2014.

• M. Petricca, P. Albicocco, G. C. Cardarilli, A. Nannarelli, and M. Re, "Power Efficient Design of Parallel/Serial FIR Filters in RNS", in Proc. of 46th Asilomar Conference on Signals, Systems, and Computers. pp. 1015-1019, Nov. 2012.

Selected Older Publications (2000-2001)

• GC. Cardarilli, A. Nannarelli and M. Re.
  "Reducing Power Dissipation in FIR Filters using the Residue Number System",
  Proc. of 43rd IEEE Midwest Symposium on Circuits and Systems, Volume 1, pages 320-323, Lansing (MI), USA, Aug. 8-11, 2000.

• A. D'Amora, A. Nannarelli, M. Re and GC. Cardarilli
  "Reducing Power Dissipation in Complex Digital Filters by using the Quadratic Residue Number System",
  Proc. of 34th Asilomar Conference on Signals, Systems, and Computers, pages 879-883, Asilomar Hotel and Conference Grounds, Pacific Grove, CA, USA. Oct. 29 - Nov. 1, 2000.

• A. Nannarelli, M. Re and GC. Cardarilli
  "Tradeoffs between Residue Number System and Traditional FIR Filters",
  Proc. of IEEE International Symposium on Circuits and Systems, Vol. II, pages 305-308, Sydney (AUS), May 6-9, 2001.

• M. Re, A. Nannarelli, GC. Cardarilli and R. Lojacono
  "FPGA Implementation of RNS to Binary Signed Conversion Architecture",
  Proc. of IEEE International Symposium on Circuits and Systems, Vol. IV, pages 350-353, Sydney (AUS), May 6-9, 2001.

• Del Re, A. Nannarelli, and M. Re
  "Implementation of Digital Filters in Carry-Save Residue Number System",
  Proc. of 35th Asilomar Conference on Signals, Systems, and Computers, Asilomar Hotel and Conference Grounds, Pacific Grove, CA, USA, Nov. 4-7, 2001.

Modified by Alberto Nannarelli on Sunday October 01, 2023 at 16:23