• A. Nannarelli. "Reliability in Warehouse-Scale Computing: Why Low Latency Matters", Proc. of MEDIAN Finale, Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, Tallinn, Estonia, Nov. 10-11, 2015.

• A. Calimera, W. Liu, E. Macii, A. Nannarelli, and M. Poncino, "Power and Aging Characterization of Digital FIR Filters Architectures", in Proc. of the First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12), Annecy, France. June 2012.

• W. Liu and A. Nannarelli. "Power Dissipation Challenges in Multicore Floating-Point Units", 21st IEEE International Conference on Application-specific Sy stems, Architectures and Processors (ASAP 2010), p. 257-264. Rennes, France. July 2010.

• W. Liu and A. Nannarelli. "Temperature Aware Power Optimization for Multicore Floating-Point Units", Proc. of 44th Asilomar Conference on Signals, Systems, and Computers, p. 1134-1138. Pacific Grove (CA), USA. Nov. 2010.

Modified by Alberto Nannarelli on Sunday November 06, 2016 at 18:07