[1] Andreas Gamborg. FPGA-design and implementation of RISC-V processor. Bachelor's Thesis, 2019.
[2] Hans Jakob Damsgaard. Implementation and Optimization of a RISC-V Processor on a FPGA. Bachelor's Thesis, 2019.
[3] Simon Thye Andersen and Anthon Vincent Riber. Hardware accelerator for image processing using FPGA. Bachelor's Thesis, 2018.
[4] Nicolai Wejs Hansen and Jacob Hebsgaard Jessen. Network-on-Chip in FPGA. Bachelor's Thesis, 2018.
[5] Mathias Linkis. Power and performance implications of using variable length NOC packets in a multicore audio. Bachelor's Thesis. Collaboration with Oticon A/S., 2018.
[6] Andreas Toftegaard Kristensen. High level synthesis and dynamic partial reconfiguration of FPGAs for accelerating software tasks in real-time systems. Bachelor's Thesis, 2017.
[7] Jon Emil Granberg. Lens Rectification and Distortion Correction in FPGAs using High Level Synthesis. Bachelor's Thesis (formal collaboration with Autoliv AB, Sweden), 2017.
[8] Maja Lund. Hit-in-hardware miss-in-software cache memory. Bachelor's Thesis, 2016.
[9] Mathias Eide Eriksen. Program debug controller for a digital signal processor used in hearing aids. Bachelor's Thesis (Formal collaboration with GN ReSound A/S), 2014.
[10] Dennis True. A digital processor for use in a class-D audio amplifier. Bachelor's Thesis (Formal collaboration with Merus Audio ApS.), 2014.
[11] Peter Skau-Jakobsen. Production test of FPGA dominated systems. Bachelor's Thesis (Formal collaboration with Axcon ApS.), 2013.
[12] R. B. Sørensen and J. Højgaard. PCIe to Parallel Interface bridge in low-cost FPGA. Bachelor's Thesis, IMM-B.Sc-2010-33 (Formal collaboration with Vitesse Semiconductor Corporation Denmark), 2010.
[13] K. M. Andersen and M. A. A. Al-Nakeeb. . Bachelor's Thesis, IMM-B.Eng-2010-31 (Formal collaboration with Prevas A/S), 2010.
[14] T.N. Jeppe. In field hearing aid datalogger. Bachelor's Thesis, IMM-B.Eng-2010-xx (Formal collaboration with Oticon Inc.), 2010.
[15] M. Møller. Et alternativ til RTOS på en FPGA. Bachelor's Thesis, IMM-B.Eng-2008-46 (Formal collaboration with Data Respons A/S, 2008.
[16] M. Stein. Billedbehandling i FPGA - Stregkodeaflæsning. Bachelor's Thesis, IMM-B.Eng-2007-44, 2007.
[17] L. F. Pedersen. Mesh network sniffer. Bachelor's Thesis, IMM-B.Eng-2007-35, 2007.
[18] J. B. Jensen and J. R. Nielsen. Compiling from Haste to CDFG: a front end for an asynchronous circuit synthesis system. Bachelor's Thesis, IMM-B.Sc-2007-08, 2007.
[19] N. D. Tørring. Multiprocessor in a FPGA. Bachelor's Thesis, IMM-B.Sc-2007-10, 2007.

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