Copyright 2002 IEEE. Published in the Proceedings of 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2002), p. 185-196, San Jose, California (USA), July 17-19, 2002.
Abstract - Since a large portion of the critical path in an implementation of radix-4 division corresponds to the delay of the quotient-digit selection module, it is of interest to reduce this delay. The proposal of this paper extends the approach presented recently of prestoring the selection constants corresponding to the actual value of the divisor and to perform the determination of the quotient digit by carry-free subtraction and sign detection. This extension consists in advancing the subtraction so that it is outside of the critical path. This advancement also provides the possibility of placing the registers so as to minimize the cycle time. We present the method and report results of synthesis using a family of standard cells. We conclude that the extension results in a speedup of 1.35 with respect to the standard implementation and of 1.3 with respect to the previously mentioned approach. We estimate that the areas of all three units are about the same.
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